Low Power VLSI techniques for portable devices.

 In present day scenario, building circuit with low power has become important and challenging task. The designing of any processor for portable devices demands low power. This can be done by incorporating low power design strategies and rules at various strategies and rules at various stages of design. To increase the the performance and durability of devices power backup should be taken into consideration.

Today more than 95% of VLSI chips are made out of silicon. It consists of millions of transistors housed in small chip. Silicon is group IV element semiconductor having various desirable properties. The VLSI technology is divided into two categories. One is BJT and another is MOSFET technology. When we talk about very high speed circuit we usually have transistors in Bipolar Junction Form and when using about very high packing density, we usually use MOSFET. 



The clock rate of processor technology has increased from 167 megahertz to 1000 megahertz and today some processors run with some gigahertz. With advancement of technology size of microprocessors is decreasing gradually starting from 0.45 micron to 0.25 micron, even today area size of current microprocessors is about 60 nanometers to 45 nanometers. With decreasing the size of microprocessors the amount of supply voltage and power dissipation will also decrease, but peak power dissipation has increased from 30 watts to 100 watts.

Most of the today's high performance processors consume about 100 watts. So effective cooling techniques and packaging techniques are of must need. 

In CMOS we can divide sources of power dissipation in two categories: Static Power and Dynamic Power. Dynamic Power is when circuit is in action, performing some operations. Static Power is when circuit is in standby mode.

Today every electronic design aims at striking a balance between performance and power efficiency. The current need of every system is having low power dissipation at every stage and in various fields and systems. If we able to reduce the power dissipation then automatically cost of electronic design associated with cooling and packaging will reduce and efficiency will increase. 

Written by Kshitij Prasad Patil

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