INTRODUCTION TO LOW POWER VLSI DESIGN

 

INTRODUCTION:

     As we all know designing a circuit for low power has become so much important in present situation.Power consumption is very big challenge in modern day VLSI Design.Almost all devices run on battery power .ex mobile,laptops. So various strategies have been proposed to control power dissipation like we have added fourth dimension .Traditionally in 1970 and 1980's Area and Delay were the most imporatant  characterstics  .But as the circuits becomes complex Area and Delay were not only the parameters .As complexity in circuit increased ,chips needs to go through the process of testing .So the task of testing become more difficult that why in 1980's and 1990's third parameter is introduced which is testability. Then in 2000's with th advent of battery operated mobile devices power becomes very imporatant fourth parameter.So after that the more focus is on the low power means building the circuits which will consume the less power.

Terminologies related to power:

  • Instantaneous power
  • Energy
  • Average power
Instantaneous power : It is the simply product of current and the voltage flowing from vdd to ground we call it idd.But as we know instantaneuos power does not give the clear picture as it only gives the specific information at the certain point. Sometimes the instantaneous power is very high but for very high period of time we are consuming very low power. So some sort of average is more meaningful .
                                           
                                                   P(t)= idd(t) vdd

Energy: It is defined as the integral of the instantaneous power over period of time.
                     
                                                E = ∫ p(t) dt= ∫ idd(t) vdd dt          limit from 0 to t.

Average power: It is simply the Energy divide by the time.Normally when we evaluate the power consumption of a circuit or a device we talk about the Energy or Average power.

                                              Pavg=E/T= 1/T∫ idd(t) vdd dt            limit from 0 to t.



As the power get dissipitated in chips ,so there are different types of power dissipation .

Types OF Power Dissipation:

  • Dynamic Power
  • Short-Circuit Power
  • Static Power
The source of these dissipation are different ,so the strategies to counter them also different.

Dynamic Power


The dynamic power as name suggests which is depending on the dynamics of the circuits. Dynamics means something which changes with so dynamics powers by its defination means wherever some signal is circuits are changing those changes cause some dissipation of power that is Dynamic Power.
              


Lets take an example of CMOS Inverter ,here is one PMOS and one NMOS transistor and here is one input A and output Y .Y is given by the compliment of A.Lets assume one load capacitor is connected to the terminal Y. When value of switches from 0 to 1 lets value of Y will be switching from one to zero.When Y is changing from high to low means capacitor is getting discharged and whenever the Y is changing from low to high capacitor is getting charged.
The discharging path of capacitor is this through the pull down transistor and charging path is through pull up transistor. So the everytime the charging and discharging of a capacitor it will consume power because from circuit theory current is defined as cdv dt.




Lets have look on the mathematical terms 


If the frequency of the output switching is fsw ,the charging and discharging cycle will repeat itself  T*fsw times over a time interval T.


Calculation of average dynamic power :


P(dynamic) = 1/T ∫ idd (t) Vdd dt
                = Vdd/T ∫ idd(t) dt
                     =Vdd/T[T fsw C Vdd]
              =C Vdd*Vdd fsw
   

                                                                                               limit is from  0 to T





CONCLUSIONS:  As we can see it the expression we get 3 points
  • Dynamic power is proportional to load capacitance ,so by reducing the capacitance we can reduce the dynamic power
  • Dynamic power is proportional to sqaure  of  Vdd,so if it is possible to reduce the supply voltage we can minimize the dynamic power.
Dynamic Power is proportional to switching frequency.




THIS BLOG WILL BE CONTINUED WITH REMAINING INFORMATION >

Link to next blog: https://blogonlowpowervlsidesign.blogspot.com/2021/04/types-of-power-dissipation-in-low-power.html


Written by - Shreenath Naikwade



REFERENCES: Low power VLSI Design by Npatel online Course . prof. Indranil Sengupta
International Journal of Pure and Applied Mathematics Volume 118 No. 19 2018, 2997-3009 
NECESSITIES OF LOW-POWER VLSI DESIGN STRATEGIES AND ITS INVOLVEMENT WITH NEW TECHNOLOGIES B.Hema Latha1 1Assistant Professor, Department of Electronics and Communication Engineering, Anurag Group of Intuitions, Hyderabad, Telangana, India














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