Power Dissipation in CMOS Circuits

 Types of Power Dissipation:

There are different ways by which power dissipation occurs and they are broadly classified into two types:-

Figure 1: Power Dissipation Flowchart

The total power dissipated in any circuit is given by the term:-
P Total =P Dynamic + P Static+ P Short circuit 

1. Dynamic power dissipation.
2. Static power dissipation.

The main difference between the static and dynamic power dissipation, is the former occurs when the circuit is idle and the latter occurs when the circuit is actively switching from one state to another. It may also consume power while the charging and discharging operations.

Static power dissipation

When a CMOS circuit is in an idle state there is still some static power dissipation–a result of leakage current through nominally off transistors. Both nMOS and pMOS transistors used in CMOS logic gates have finite reverse leakage and sub-threshold currents. In a silicon chip there are millions of transistors and the overall power dissipation due to leakage current is comparable to dynamic power dissipation. The values of leakage and sub-threshold currents depend upon processing parameters. Consider an nMOS transistor shown in Figure 


The main leakage current component in nMOS is the reverse-biased diode structure in which the n+ bar forms the n-junction and p-substrate forming the p-junction of the diode. The magnitude of this leakage current is given by equation below.


Where
Vbias is the voltage across junction,
A is the junction area,
q is the charge of electron,
k is the Boltzmann's constant (1.3807X10e-23 J/K) and
T is the operating temperature.


Written by : Yogesh Metkari



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